Collabora Adds HEVC/H.265 to NXP’s i.MX 8M
March 03, 2021
Support for the IP is enabled via the aforementioned kernel driver and through a userspace component that can be accessed using frameworks like FFMPEG and GStreamer.
Collabora, a design firm focusing on open-source software technology, recently announced the implementation of H.264 decode and HEVC/H.265 decode support for the NXP i.MX8 M chipset. Building on work with the VeriSilicon Hantro Codec and Hantro Video4Linux2 (V4L2) kernel driver, the Collabora solution now supports all basic HEVC 5.1 features, with potential for enhanced features such as 10-bits depth per sample with 4:2:0 chroma sampling, scaling, or tile decoding reserved for the future.
Support for the IP is enabled via the aforementioned kernel driver and through a userspace component that can be accessed using frameworks like FFMPEG and GStreamer. According to Collabora, driver support will help advance the HEVC V4L2 stateless API so that it can be removed from the staging directory.
The VeriSilicon Hantro Codec is small-but-power-efficient video IP that operates as a stateless accelerator. As a stateless device, it can operate without firmware, which makes it an attractive option in open-source platforms where control and robustness are desirable. HEVC operations are handled by the IP’s G2 video processor instead of the G1 block where the JPEG, MPEG-2, VP8, and H.264 codecs are housed.
In addition to the i.MX8, the Hantro Codec is available on SoCs from Microchip, Rockchip, and others.
For more information, visit www.collabora.com.