Scenes From the European Xilinx Developer Forum
December 02, 2019
Held on three continents, America, Europe, and Asia, the forum brings together Xilinx engineers, solution developers, and Xilinx partners
Communities and the people that make them up are the foundation of society, from the local neighborhood BBQ club to the G7. Communities gather shared interests, topics, and goals, and foment growth and the creation of the next generation to carry on. The engineering community is no different, and the events held to support and nurture them are an important part of opur industry.
Recently we had the opportunity to attend the 2019 European Xilinx Developer Forum (XDF). Held on three continents, America, Europe, and Asia, the forum brings together Xilinx engineers, solution developers, and Xilinx partners to network, learn, and develop (Figure 1). The European event was held this year in The Hague, Netherlands.
Figure 1: The Xilinx Developer Forum brings together Xilinx engineers, solution developers, and Xilinx partners.
Building the future
Engineering development is a mixture of both prophesy and practicality. Forward visions must be tempered with cold reality, as the future must be built in the real world, and vaporware makes for poor building materials. This has inspired many companies, including Xilinx, to frame their solutions in the context of the applications addressed, help develop the systems needed, and create the building blocks of those systems. During the keynote, Xilinx President and CEO Victor Peng explained the company’s vision of data-center development, and how Xilinx helps to enable that future.
Figure 2: Xilinx President and CEO Victor Peng explains the company’s vision of data-center development.
Among the company’s latest initiatives is their Versal technology, which is the vanguard of their adaptive compute acceleration platform, or ACAP, with the intent to migrate CPUs, GPUs and FPGAs in the data center to the next level of performance. Versal is Xilinx's effort to commercialize and deploy the next generation of artificial intelligence and machine learning. ACAP's hardware and software can dynamically change, based on the data workload and type of computing task it is confronted with.
The Versal ACAP architecture is based on a flexible network on a chip that integrates multiple aspects of the hardware platform, and makes them programmable to developers, hardware engineers, and data scientists (Figure 3). The support infrastructure for Versal also involves software, code libraries, middleware and frameworks.
Figure 3: The Versal ACAP architecture is an integrated programmable hardware platform
Versal devices are presented as the industry's first adaptive compute acceleration platforms that combine adaptable processing and acceleration engines with programmable logic and configurable connectivity. This enables the creation of customized, heterogeneous hardware solutions for a wide variety of applications. Features of the platform include an integrated silicon host interconnect shell and Intelligent (AI and DSP), Adaptable, and Scalar Engines.
The devices are currently available in two families. The AI Core Series is a high-compute collection that offers medium-density programmable logic and connectivity capability, coupled with AI and DSP acceleration engines. The Prime Series is a mid-range series that offers medium-density programmable logic, signal processing, and connectivity capability.
Victor Peng also announced the expansion of Xilinx’s automotive-qualified 16-nm family with the Xilinx Automotive Zynq UltraScale+ MPSoC 7EV and 11EG. These two devices are presented as having the highest programmable capacity, performance, and I/O capabilities available, enabling high-speed, data aggregation, pre-processing, and distribution, as well as compute acceleration for L2+ to L4 advanced driver-assistance systems (ADAS) and autonomous-driving applications.
The Zynq UltraScale+ MPSoC 7EV and 11EG are presented as having the highest programmable capacity, performance, and I/O capabilities available
The new XA Zynq UltraScale+ MPSoC 7EV and 11EG devices were developed as a result of customer demand. The devices offer over 650,000 programmable logic cells – and nearly 3,000 DSP slices, which is 2.5X increase versus the previous largest device. In addition, the XA 7EV contains a video codec unit for h.264/h.265 encode and decode, while the XA 11EG includes 32 12.5Gb/s transceivers and provides four PCIe® Gen3x16 blocks.
In this video, Sreesan and Ghirish from Xilinx explain two live demonstrations at the Xilinx Developer Forum 2019 in the Hague, Netherlands. Based on the company's recently-announced Versal adaptive compute acceleration platform, or ACAP. One of the demonstrations used speech-to-text to underscore the ability of their solution to accelerate AI-driven functionality. The other shows video processing in real time, targeting image recognition for edge computing and autonomous driving.
In this video Ryan from Xilinx explains the company’s Versal Prime devices, presented as the first adaptive compute acceleration platforms (ACAP), combining adaptable processing and acceleration engines with programmable logic and configurable connectivity. The AI Core Series offer medium-density programmable logic and connectivity, coupled with AI and DSP acceleration engines, and the Prime Series offers medium-density programmable logic, signal processing, and connectivity capability.
In this video Gordon Galic from LogicBricks talks about an automotive ADAS video demo at the Xilinx Developer Forum in The Hague, Netherlands. One of the features if the demo was the company’s logiRECORDER-30 Automotive Video Data Logger The device can improve and accelerate test, validation, and design of video- and vision-based ADAS/AD with raw multi-channel video and network data recording, data analysis, and playback.
Xylon's logiRECORDER data logger connects to various types of vehicle's network data busses, and inserts between any type of vehicle camera installation and the Electronic Control Units to non-invasively record and playback terabytes of multi-channel uncompressed video and network data with low latency.
In this video Alexander from AVNET Silica explains a demonstration with a LIDAR-equipped robot using a Zynq UltraScale+ MPSoC device, which provides 64-bit processor scalability while combining real-time control with soft and hard engines for graphics, video, waveform, and packet processing. In the demonstration, the robot uses its LIDAR vision to navigate obstacles placed in front of it.
Growth and development of an industry and its members can only come about in an environment that supports communication, fosters competition, and foments development. Events like the Xilinx Developer Forum represent the positive impact such gatherings can have on people and the industry in electronic engineering.