FPGA Platform from Lattice Semi Sets a New Standard for Efficiency

December 19, 2019

News

FPGA Platform from Lattice Semi Sets a New Standard for Efficiency

According to Lattice Semiconductor, the company introduced Nexus Platform, the industry?s first 28 fully-depleted silicon-on-insulator (FD-SOI) FPGA platform.

According to Lattice Semiconductor, the company introduced Nexus Platform, the industry’s first 28 fully-depleted silicon-on-insulator (FD-SOI) FPGA platform. Along with the CrossLink-NX FPGA, which is built on that Nexus platform, developers have a solution for low-power applications. These applications involve embedded vision and AI, particularly those in the industrial space. Some of the noted architectural features include optimized DSP blocks and higher on-chip memory capacity, which result in power-efficient computing, such as AI inferencing algorithms.

A key feature of the FPGA architecture is the fast configuration for instant-on type applications. I/O configures in 3 ms and device configuration can be as fast as 8 ms. Nexus is developed on high-volume 28-nm FD-SOI process technology developed by Samsung. This technology features 50% lower transistor leakage compared to products based on bulk CMOS. For easier and quicker integration, Lattice is providing system-level solutions that combine design software and pre-engineered soft IP blocks with evaluation boards, kits, and reference designs. These solutions are aimed at areas like sensor bridging, aggregation, and image processing.

The CrossLink-NX FPGA provides low power, a small form factor, and high reliability. When you bring 5G into the picture, there’s a need for a solution like this for industrial applications that take advantage of cloud-based analytics. And when you can significantly reduce the data latencies while performing functions in parallel, those analytics become more feasible.

The first CrossLink-NX device is available in a 6x6-mm form factor, far smaller than typical devices targeting these same applications. A host of IP cores are available, including interfaces like MIPI D-PHY, PCIe, SGMII, OpenLDI, and demos for common embedded visions applications such as 4:1 image sensor aggregation.

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