Pentek’s Quartz 3U VPX RFSoc FPGA Board for DRFM and Radar Apps

Pentek, Inc., today introduced its first product in the Quartz Architecture family, the Model 5950, an eight-channel A/D and D/A converter, 3U OpenVPX board based on the Xilinx Zynq UltraScale+ RFSoC FPGA. The low latency benefits of the Quartz architecture support DRFM (Digital RF Memory) and radar applications that were previously not possible with earlier generation products.

“The Quartz architecture takes our board designs to a new level," said Bob Sgandurra, director of Product Management of Pentek. "The architecture is based on our RFSoC QuartzXM eXpress Module containing the RFSoC FPGA and all needed support circuitry. By addressing some of the most demanding circuit and PCB design challenges in the module, Pentek, as well as our customers, can leverage the design and use the module on a carrier in a standard form factor like 3U VPX as well as custom carriers to match specific application requirements. Customers can develop their system software and IP on the 3U VPX product in the lab and then deploy the QuartzXM eXpress Module wherever it is needed.”

“The Zynq Ultrascale+ RFSoC FPGA from Xilinx is a very high density solution providing built in A/Ds, D/As and ARM processing power plus additional DSP slices within the FPGA to build custom IP. Compared to discrete component solutions, the RFSoC FPGA is 50% lower in cost and draws 40% less power,” said David Gamba, Xilinx senior director for the Aerospace and Defense Market. He added, “We are pleased that Pentek has developed board-level solutions that allow customers to take full advantage of the RFSoC technology. Their high-speed system connectivity, additional factory-installed IP for radar and communications, along with their unique QuartzXM eXpress Module design, all squarely target Mil-Aero market needs.”

 

The Quartz Architecture Difference

The Pentek Quartz architecture embodies a streamlined approach to FPGA boards, simplifying the design to reduce power and cost, while still providing some of the highest performance FPGA resources available today. Designed to work with Pentek’s Navigator Design Suite tools, the combination of Quartz and Navigator offers users an efficient path to developing and deploying FPGA software and IP for data and signal processing.

The Xilinx Zynq UltraScale+ RFSoC Processor integrates eight RF-class A/D and D/A converters into the Zynq FPGA fabric and quad ARM Cortex-A53 and dual ARM Cortex-R5 processors, creating a multichannel data conversion and processing solution on a single chip. Complementing the RFSoC’s on-chip resources, the Quartz board architecture adds:

 

? Up to 18 GBytes of DDR4 SDRAM

 

? Sophisticated clocking for single-board and multi-board synchronization

 

? High-signal integrity connectors for RF inputs and outputs

 

? x8 PCIe Gen 3 link

 

? An 8 lane, 28 Gb/sec optical interface supporting a built-in dual 100 GigE interface or customer installed protocols

 

? 12 LVDS general purpose I/O pairs for specialized interfaces

 

? QuartzXM eXpress Module design for flexible development and deployment

 

? Factory-installed application IP

 

Factory Installed IP Advances Development

The Model 5950 is pre-loaded with a suite of Pentek IP modules to provide data capture and processing solutions for many common applications. Modules include DMA engines, DDR4 memory controller, test signal and metadata generators, data packing and flow control. The board comes pre-installed with IP for DFRM, triggered waveform and radar chirp generator, triggered radar range gate engine, wideband real-time transient capture, flexible multi-mode data acquisition and extended decimation. The Model 5950 can be used out-of-the-box with the built-in functions requiring no FPGA development.

 

Data Conversion

The front end accepts analog IF or RF inputs on eight front panel MMCX connectors with transformer-coupling to eight 4 GSPS 12-bit A/D converters delivering either real or complex DDC samples. With additional IP-based decimation filters, the overall DDC decimation is programmable from 2 to 128. The eight D/A converters accept baseband real or complex data streams from the FPGA’s programmable logic. Each 6.4 GSPS 14-bit D/A includes a digital upconverter with independent tuning and interpolations of 1x, 2x, 4x and 8x. Each D/A output is transformer-coupled to a front panel MMCX connector.

 

Expandable I/O

The Model 5950 supports VITA-66.4 providing eight 28 Gb/sec duplex optical lanes to the backplane. With two built-in 100 GigE UDP interfaces or a user-installed serial protocol, the VITA-66.4 interface enables gigabit communications independent of the PCIe interface.

 

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Navigator Design Suite for Streamlined IP Development

Pentek's Navigator Design Suite includes: Navigator FDK (FPGA Design Kit) for custom IP and Navigator BSP (Board Support Package) for creating host software applications.

The Navigator FDK includes the board’s entire FPGA design as a block diagram that can be edited in Xilinx's Vivado tool suite, all source code and complete documentation is included. Developers can integrate their IP along with the factory-installed functions or use the Navigator kit to replace the IP with their own. The Navigator FDK Library is AXI-4 compliant, providing a well defined interface for developing custom IP or integrating IP from other sources.

The Navigator BSP supports Xilinx’s PetaLinux on the ARM processors. Users work efficiently using high-level API functions, or gain full access to the underlying libraries including source code. Pentek provides numerous examples to assist in the development of new applications.

 

Pre-Configured SPARK System Ready for Immediate Use

The 3U VPX SPARK development systems are ready for immediate operation with software and hardware installed. In many applications, the SPARK development system can become the final deployed application platform.

 

Pricing and Availability

For the latest pricing and availability information, please contact Mario Schiavone by phone at (201) 818-5900 ext.229, or by email at [email protected].