Ambiq Micro extends its ultra-low power SoC platform to battery-powered Edge devices
January 03, 2019
my step-counter watch built with an Ambiq processor needs a new battery around once a year. The extreme low power comes from something called Subthreshold Power Optimized Technology.
As far as I can tell, Ambiq Micro is already the leader in low-power MCUs. I offer proof of that—my step-counter watch built with an Ambiq processor needs a new battery around once a year. I find that pretty amazing. The extreme low power comes from something called Subthreshold Power Optimized Technology, or SPOT.
To that end, the company recently announced a new generation device, the Apollo3 Blue Wireless SoC, which brings the active power consumption down to less than 6 μA/MHz. The device, built with an ARM Cortex M4F core running at up to 96 MHz, integrates Bluetooth low energy (BLE5) and offers some updated peripherals, additional memory, and an advanced DMA engine. The BLE5 is handled with a separate core, so there’s no sharing of resources for the host CPU. The SoC is configured with 1 Mbyte of flash memory, 384 kbytes of SRAM, and 16 kbytes of cache.
Another key feature of Apollo3 is the use of what Ambiq is calling TurboSPOT. This technology becomes necessary because it’s more difficult to run SPOT at higher frequencies. With the Apollo2 and Apollo2 Blue devices, SPOT runs at 48 MHz. Some enhancements were needed and completed to be able to run Apollo3 Blue at 96 MHz, while maintaining the same manufacturing node. Hence, TurboSPOT.
Ambiq notes that the active power level is obviously higher than when running at 48 MHz, but certainly still beats competitors by a considerable margin. TurboSPOT lets customers speed up the device when needed, but still maintain a high level of efficiency.
Package options for Apollo3 Blue include an 81-pin, 5- by 5-mm BGA with 50 GPIO pins or a 66-pin, 3.37- by 3.25-mm CSP with 37 GPIO pins. Evaluation boards and a software development kit are available.