SiFive to Present Latest Technology Developments at RISC-V Summit
November 30, 2018
Company founders and executives to discuss current state of silicon in the cloud, embedded software applications and more.
Company founders and executives to discuss current state of silicon in the cloud, embedded software applications and more
SAN MATEO, Calif., Nov. 28, 2018 /PRNewswire/ --
WHO: SiFive, the leading provider of commercial RISC-V processor IP, and the following executives:
- Krste Asanovic, co-founder and chief architect
- Yunsup Lee, co-founder and chief technology officer
- Jack Kang, vice president, product marketing
- Palmer Dabbelt, engineer
- Nathaniel Graff, engineer
WHAT: SiFive will present six keynote and track sessions at this year's RISC-V Summit in Santa Clara, Calif. As SiFive continues its mission to democratize access to custom silicon, the company will present the following sessions:
- Tuesday, Dec. 4:
- 8:40 a.m. – "RISC-V State of the Union" with Krste Asanovic
- 1:10 p.m. – "Embedded Intelligence Everywhere" with Jack Kang
- 1:35 p.m. – "NVIDIA's Deep Learning Accelerator meets SiFive's Freedom Platform" with Yunsup Lee and Frans Sijstermans, NVIDIA
- o 2 p.m. – "SiFive Freedom Revolution: Customizable RISC-V AI Platform with HBM2 and 56-112Gb/s SerDes" with Krste Asanovic
- Wednesday, Dec. 5:
- 9 a.m. – "Opportunities and Challenges of Building Silicon in the Cloud" with Yunsup Lee
- 2:40 p.m. – "SiFive TERP: A Trusted Execution Reference Platform for Embedded Secure Applications" with Palmer Dabbelt and Nathaniel Graff
Attendees can also visit SiFive at booth #202 for demos of the HiFive1 and HiFive Unleashed boards as well as various customer devices. For more information or to register for the event, please visit: https://tmt.knect365.com/risc-v-summit/purchase/select-package
WHEN: Monday, December 3, 2018 to Thursday, December 6, 2018
WHERE: Santa Clara Convention Center, Santa Clara, Calif.
SiFive is the leading provider of market-ready processor core IP, development tools and silicon solutions based on the free and open RISC-V instruction set architecture. Led by a team of seasoned silicon executives and the RISC-V inventors, SiFive helps SoC designers reduce time-to-market and realize cost savings with customized, open-architecture processor cores, and democratizes access to optimized silicon by enabling system designers in all market verticals to build customized RISC-V based semiconductors. SiFive is located in Silicon Valley and has backing from Sutter Hill Ventures, Spark Capital, Osage University Partners, Chengwei, Huami, SK Hynix, Intel Capital, and Western Digital. For more information, visit www.sifive.com.