RISC-V Announces First New Specifications of 2022, Adding to 16 Ratified in 2021

By Tiera Oliver

Associate Editor

Embedded Computing Design

June 22, 2022

News

RISC-V Announces First New Specifications of 2022, Adding to 16 Ratified in 2021

RISC-V International announced its first four specification and extension approvals of 2022 – Efficient Trace for RISC-V (E-Trace), RISC-V Supervisor Binary Interface (SBI), RISC-V Unified Extensible Firmware Interface (UEFI) specifications, and the RISC-V Zmmul multiply-only extension.

The news builds on momentum from 2021, in which 16 specifications representing more than 40 extensions were ratified. 

“These new specifications accelerate embedded and large-system design,” said Mark Himelstein, CTO of RISC-V. “Debugging is one of the hardest things to do on a chip,” he explained. “E-Trace for RISC-V creates a standard way to do processor trace that’s extremely efficient and is especially useful in embedded system design.”

  • E-Trace for RISC-V defines a highly efficient approach to processor tracing that uses a branch trace, ideal for debugging any type of application from tiny embedded designs to super powerful computers. E-Trace for RISC-V documentation specifies the signals between the RISC-V core and the encoder (or ingress port), a compressed branch trace algorithm, and a packet format to encapsulate compressed branch trace information. Development and ratification of this specification was led by Gajinder Panesar of Picocom and RISC-V’s E-Trace Task Group.

“RISC-V SBI offers developers a similarly critical resource,” Himelstein added. “The ability to port supervisor-mode software across all RISC-V implementations, essentially allowing developers to write something once and apply it everywhere.”

  • RISC-V specification for SBI architects a firmware layer between the hardware platform and the operating system kernel using an application binary interface in supervisor mode (S-mode or VS-mode).  This abstraction enables common platform services  across all RISC-V operating system  implementations. Many RISC-V members have already implemented the RISC-V SBI specification in their RISC-V solutions, so ratifying the specification will ensure a standard approach across the entire RISC-V ecosystem, ensuring compatibility. Development and ratification of this specification were led by Atish Patra of Rivos, with work conducted in the Platform Horizontal Steering Committee. 

“UEFI is a critical element of any system,” said Himelstein, “In some applications, it may replace basic BIOS software.”

  • RISC-V UEFI Protocols bring existing UEFI standards onto RISC-V platforms. Development and ratification of this specification were led by Sunil V L, Ventana Micro and Philipp Tomsich, VRULL GmbH, with work conducted in the Privileged Software Technical Working Group. 

“For many microcontroller applications, division operations are too infrequent to justify the cost of divider hardware,” explained Himelstein. “The RISC-V Zmmul extension will benefit simple FPGA soft cores in particular.”

  • RISC-V Zmmul Multiply Only enables low-cost implementations that require multiplication operations but not division, and is part of the RISC-V Unprivileged Specification. Development and ratification of this extension were led by Allen Baum, with work conducted in the Unprivileged ISA Committee. 

RISC-V announced the ratifications at Embedded World here, where RISC-V is the focus of several talks. RISC-V International is also hosting a pavilion of member-company innovations in the exhibition hall through June 23rd. Showcase participants include Andes TechnologyCAES, Cobham GaislerCanonical UbuntuCodasipCodeplayDigital Core TechnologiesGreenWave TechnologiesImperasOpenHW GroupSiFiveSyntacore and Ventana Micro Systems.

visit www.riscv.org.

Tiera Oliver, Associate Editor for Embedded Computing Design, is responsible for web content edits, product news, and constructing stories. She also assists with newsletter updates as well as contributing and editing content for ECD podcasts and the ECD YouTube channel. Before working at ECD, Tiera graduated from Northern Arizona University where she received her B.S. in journalism and political science and worked as a news reporter for the university’s student led newspaper, The Lumberjack.

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