Infineon Adds 650 V TOLL Portfolio to its CoolSiC MOSFET Family

By Tiera Oliver

Associate Editor

Embedded Computing Design

July 19, 2023

News

Infineon Adds 650 V TOLL Portfolio to its CoolSiC MOSFET Family

Munich, Germany –Infineon Technologies AG added 650 V in TO leadless (TOLL) packaging to its silicon carbide (SiC) CoolSiC MOSFET family to address electro-mobility and power consumption demands.

The new SiC MOSFETs are designed to enhance the CoolSiC portfolio by enabling lower losses, higher reliability, and simplified use in applications such as SMPS for servers, telecom infrastructure, energy storage systems, and battery formation solutions.

The new family of CoolSiC 650 V high-performance trench-based power SiC MOSFETs are available in a JEDEC-qualified TOLL package supporting a low parasitic inductance for higher switching frequency, reduced switching losses, ideal thermal management and power density, and automated assembly.

The CoolSiC 650 V MOSFETs feature the .XT interconnect technology which is designed to support the devices’ thermal performance by reducing the thermal resistance (R th) and thermal impedance (Z th). Per the company, the new devices also feature a gate threshold voltage (V GS(th)) greater than 4 V for robustness against parasitic turn-on, a body diode, and a gate oxide (GOX) for low FIT (failures in time) rates.

While a cut-off voltage (V GS(off)) of 0 V is generally recommended to simplify the driving circuit (unipolar driving), the new portfolio supports a wide driving interval of V GS voltage within the range of -5 V (turn-off) to 23 V (turn-on). According to the company, this enables flexibility with other SiC MOSFETs and standard MOSFET gate-driver ICs.

The new CoolSiC MOSFET 650 V in TOLL industrial-grade discretes are available in various drain-source on-resistance (R DS(on)) options from 22 to 83 mΩ and can be ordered now (107, 163 mΩ and 260 mΩ versions will be available on-demand).

For more information, visit: www.infineon.com/coolsic-mosfet-discretes

Tiera Oliver, Associate Editor for Embedded Computing Design, is responsible for web content edits, product news, and constructing stories. She also assists with newsletter updates as well as contributing and editing content for ECD podcasts and the ECD YouTube channel. Before working at ECD, Tiera graduated from Northern Arizona University where she received her B.S. in journalism and political science and worked as a news reporter for the university’s student led newspaper, The Lumberjack.

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