Microsemi to Showcase Third-Party IP for Machine Vision Apps Using Cost-Optimized, Low-Power PolarFire FPGAs
February 21, 2018
Microsemi will demonstrate its PolarFire FPGAs at Embedded World.
Microsemi, a provider of semiconductor solutions differentiated by power, security, reliability and performance, today announced it has expanded the third-party intellectual property (IP) offerings for its cost-optimized, low power, mid-range PolarFire field programmable gate arrays (FPGAs). With new support of artificial intelligence (AI)/machine learning IP and HDMI 2.0b interfaces, the company's award-winning PolarFire device can now be used in industrial artificial intelligence applications which leverage the rich resources in the FPGA, particularly the large quantities of digital signal processor (DSP) math blocks and embedded RAMs.
The newly expanded IP offerings make Microsemi's PolarFire FPGAs ideal for a wide variety of machine vision applications within the industrial, medical imaging, retail, defense and automotive markets. The HDMI 2.0b IP, available through Microsemi's collaboration with Bitec, enables displays up to 4K (ultrahigh definition) resolution, which can be used for AI applications such as retail advertising, smart mirror displays as well as traditional display designs like media servers and display walls. Machine learning or AI IP, offered via Microsemi's collaboration with ASIC Design Services, is a key component for machine vision applications such as sensing objects, enabling applications such as surveillance cameras to detect faces or in retail for targeted advertising, as well as advanced driver assist systems (ADAS) applications allowing automobiles to detect cars, pedestrians or other objects.
The low power characteristics of flash-based FPGAs, coupled with Microsemi's FlashFreeze mode of operation and "instant on" capability, makes PolarFire a compelling platform for AI designs implemented on FPGAs. ASIC Design Services' solution allows FPGA developers and machine learning experts to bridge the semantic gap between high-level model specification and FPGA design. For customers with limited prior experience, ASIC Design Services provides a full turnkey service including design and deep learning training, accelerating time to market.
Key features of the new machine learning/AI IP core include:
Full pipeline from convolutional neural network description to FPGA implementation
Network retraining for memory footprint minimization
Support for different network layers
Convolutional layers can implement filters of any size and stride
Support for padding
The new IP cores for PolarFire FPGAs were brought to market by Bitec and ASIC Design Services via Microsemi's Accelerate Ecosystem.
Microsemi's PolarFire FPGAs are available now, with third-party IP cores available from collaborating companies like Bitec and ASIC Design Services.