Imperas riscvOVPsim Gives RISC-V Community a Boost
November 06, 2018
Imperas leading commercial simulation technology available for free with RISC-V Open Virtual Platform Simulator (riscvOVPsim) for RISC-V software development, compliance and DV test developments.
Imperas Software Ltd. has released its riscvOVPsim - RISC-V Open Virtual Platform Simulator - as a reference Instruction Set Simulator (ISS), designed for the RISC-V software developers, implementers and early adopters community and helping them adhere to the RISC?V specifications.
The riscvOVPsim delivers industrial high-level simulation performance and quality for development and compliance testing.
It also aids hardware and software developers in a multitude of markets to develop RISC-V software and build and/or test compliance on the implementation of a RISC-V CPU.
Highlights of the riscvOVPsim include:
- An open-source, configurable RISC-V Fast Processor Model, that covers all the RISC-V permitted configurations and variants.
- An instruction-accurate RISC-V CPU simulator used for compliance and test development with exceptionally fast, high-performance simulation, running over 1 billion instructions per second on a standard host PC (Windows or Linux).
- It is available for free for personal, academic, or commercial use by simply downloading it from GitHub and running it on a standard Linux or Windows host PC.
For more information, go to www.imperas.com.