Is SiFive the RISC-V Standard Bearer, or a Design Mercenary?

By Brandon Lewis

Editor-in-Chief

Embedded Computing Design

August 27, 2020

Is SiFive the RISC-V Standard Bearer, or a Design Mercenary?

Is the RISC-V standard bearer ditching its heritage to become a design mercenary by using Arm? Or is this a longer-term play to help get RISC-V technology into SoCs so it can grow from there?

 

SiFive, a pioneer of commercializing the RISC-V instruction set and resulting IP, has announced a number of custom design wins. And a lot of them leverage Arm technology. In fact, SiFive's recent 20G1 release revealed that the company has developed SiFive Insight, debug and trace IP that features native compatibility with? You guessed it. Arm’s CoreSight IP that serves the same purpose.

So, is the RISC-V standard bearer ditching its heritage to become a design mercenary? Or is this a longer-term play to help get RISC-V technology into SoCs in any way possible so it can grow from there? Or are we over thinking it? Drew Barbier, Director of Product Marketing at SiFive, joins Brandon and Rich in this edition of the Embedded Insiders to explain.

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Brandon is responsible for guiding content strategy, editorial direction, and community engagement across the Embedded Computing Design ecosystem. A 10-year veteran of the electronics media industry, he enjoys covering topics ranging from development kits to cybersecurity and tech business models. Brandon received a BA in English Literature from Arizona State University, where he graduated cum laude. He can be reached at [email protected]

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