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Articles related to SiFive

SiFive Performance P550 Core Sets New Standard as Highest Performance RISC-V Processor IP - News

June 22, 2021

SiFive launched the new SiFive Performance family of processors.

Open Source

aicas GmbH, SiFive Collaborate to Integrate RISC-V CPU architecture, JamaicaVM Java-Based Software Management - News

April 19, 2021

aicas GmbH and SiFive are collaborating to integrate the RISC-V CPU architecture and JamaicaVM Java-based software management.

Open Source

aicas and SiFive Bridge Flexibility and Performance with RISC-V, JamaicaVM Integration - Press Release

March 02, 2021

AWS, SiFive, and aicas during embedded world 2021 will deliver a virtual demonstration of AWS IoT Greengrass 2.0 running on a SiFive RISC-V unmatched board.

Open Source

Is SiFive the RISC-V Standard Bearer, or a Design Mercenary? - Podcast

August 27, 2020

Is the RISC-V standard bearer ditching its heritage to become a design mercenary by using Arm? Or is this a longer-term play to help get RISC-V technology into SoCs so it can grow from there?

Open Source

Special COVID-19 Edition of Embedded Executive: Naveed Sherwani, CEO, SiFive - Podcast

June 24, 2020

Different vendors are doing different things to cope with the COVID-19 pandemic. Many of them are doing their part to help get us through this awful time. One of those is SiFive.

Open Source

Enabling Linux in Safety Applications Project Adds Multiple Working Groups, Members - News

June 22, 2020

The new working groups will build from progress in the SIL2LinuxMP and Real-Time Linux projects to help bridge gaps between the safety standards and Linux development ecosystems.