eSilicon CEO Jack Harding will comment on the state of the application-specific integrated circuit (ASIC) market.

Adds expertise in data science and big data analytics.

The test ASIC includes x4 112 Gbps SerDes and x8 56 Gbps SerDes, which are integrated with media access control, forward error correction, and gearbox E-pak Ethernet IP from Precise-ITC.

Program will move company's IC design activities to Google Cloud Platform this year.

State of AI and ML-Spring 2019 conference to be held April 4 in Santa Clara, Calif.

Registration for the event is open until 5:00 PM PDT on April 4.

Paper proposes a novel multi-level approach for macro placement of complex designs dominated by macro blocks