Tortuga Logic and Synopsys Join Forces on Providing SoCs with System-Level Security

By Laura Dolan

Senior Copywriter

Keap

April 26, 2019

Tortuga Logic and Synopsys Join Forces on Providing SoCs with System-Level Security

Tortuga Logic and Synopsys will provide a security verification solution that detects and inhibits weaknesses in system-on-chip (SoC) designs.

SAN JOSE, CA. Tortuga Logic and Synopsys will provide a security verification solution that detects and inhibits weaknesses in system-on-chip (SoC) designs. The solution includes various security features manufactured into Synopsys' DesignWare ARC Processor IP and Radix-S.

Radix-S is designed to inspect a system's hardware and software during the pre-silicon design and simulation phases to identify probable system-level hazards. 

Synopsys ARC Processor IP is a collection of 32-bit CPUs with optimized power and area efficiencies for a variety of embedded applications.

"DesignWare ARC Processor IP provides a rich set of security options that help protect systems from evolving security threats such as IP theft and malicious attacks," said Synopsys’ VP of marketing for IP, John Koeter. "When integrating an ARC Processor and adding application software, designers must ensure that the resulting end system remains secure. Tortuga Logic's Radix-S software is an effective tool for our customers to verify that no vulnerabilities are introduced during the integration and programming of their ARC Processor-based systems."

"Security is implementation dependent, so SoC designers need to ensure that the security features configured in their systems are not susceptible to external threats," said Tortuga Logic’s CEO, Dr. Jason Oberg. "ARC processors have state-of-the-art security features, and Radix-S complements the IP with technology that can analyze SoCs built with an ARC core, including application software, to identify security vulnerabilities that may have been introduced when implementing the complete SoC."

To learn more, visit www.tortugalogic.com.

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