Renesas Launches Low-Power Technology for Embedded Flash Memory Based on SOTB? Process

By Laura Dolan

Senior Copywriter

Keap

June 13, 2019

Renesas Launches Low-Power Technology for Embedded Flash Memory Based on SOTB? Process

Achieves read energy of 0.22 pJ/bit at 64 MHz ? among the world?s lowest levels for embedded flash memory on an MCU.

Renesas’ new low-power technology for use in embedded flash memory based on a 65 nanometer (nm) SOTB™ process is available with 1.5 MB capacity and has embedded 2T-MONOS flash memory based on 65nm SOTB technology.

Renesas achieves read energy as low as 0.22 picojoules per bit (pJ/bit) at a running frequency of 64 MHz with the supplementation of a new circuit technology that minimizes the power consumption of the peripheral circuits on flash memory.

The new embedded flash memory technology includes:

  • Low-power 2T-MONOS flash memory conducive for the SOTB process
  • Sense amplifier circuit and regulator circuit technology for ultra-low energy consumption
  • Circuit technology that significantly reduces data transmission energy consumption

For more information, visit renesas.com.

Established and meticulous copy editor and copywriter with over 14 years of experience; highly efficient, prolific and innovative.

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