eSilicon, a leading provider of FinFET ASICs, market-specific IP platforms and advanced 2.5D packaging solutions, announced today the signing of a multi-year agreement with Google Cloud to move all of its ASIC and IP design to Google Cloud Platform (GCP) this calendar year.

Under the terms of the agreement, Google Cloud will provide support from their professional services team to assist eSilicon as it moves its ASIC and IP design workloads to GCP. eSilicon has been running a hybrid on-premise/cloud environment for approximately the last 18 months, with ASIC design running on premise and IP design running primarily on GCP. This new agreement paves the way for a complete migration of all design activity to GCP.

"Google Cloud has demonstrated the resources, technical depth and domain knowledge to successfully move IC design to GCP, a significant undertaking," said Naidu Annamaneni, CIO & vice president of global IT at eSilicon. "There are many unique requirements to support this kind of workload on the cloud and the need to collaborate with several infrastructure vendors to create the complete solution. Google Cloud possessed the domain knowledge and operational focus, backed by a substantial worldwide computing capability to get the job done."

"Moving to the cloud provides the flexibility to build the right compute environment for each design project, resulting in improvements in time-to-market and design quality," said Mike Gianfagna, vice president of marketing at eSilicon. "This is a substantial project with a lot of innovation and many partners. We'll be talking more about this fast-paced program at it unfolds over the coming months."

To learn more about eSilicon's collaborative work to move to GCP read the Google Cloud Customer Brief about semiconductor design. To learn more about eSilicon's ASIC or IP capabilities, visit eSilicon's website or contact your eSilicon sales representative directly or via [email protected].

About eSilicon
eSilicon provides complex FinFET ASICs, market-specific IP platforms and advanced 2.5D packaging solutions. Our ASIC-proven, differentiating IP includes highly configurable 7nm 56G/112G SerDes plus networking-optimized 16/14/7nm FinFET IP platforms featuring HBM2 PHY, TCAM, specialized memory compilers and I/O libraries. Our neuASIC™ platform provides AI-specific IP and a modular design methodology to create adaptable, highly efficient AI ASICs. eSilicon serves the high-bandwidth networking, high-performance computing, AI and 5G infrastructure markets. www.esilicon.com

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